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This paper presents a simple architecture for 8-bit digital controlled oscillator (DCO) on 3-stages ring topology in TSMC 0.35 mum CMOS technology. A new schematic of tristate inverter is also proposed. The proposed tristate inverter has higher switching speed and low power consumption as compared to conventional one. The control digit changes the driving current that provides large tuning range from 333 MHz to 1472 MHz with very good linearity. The output voltage swing is constant and above 3 volt (>90% of the supply voltage i.e. 3.3 V). The presented circuit shows the fast response to the output frequency transition and this takes less than one clock period and without showing any ringing or damping during frequency transition. The proposed DCO has simulated phase noise of -106 dBc/Hz @ 1 Mhz and 63.4 mw power consumption at 1.1 GHz central frequency.