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Systematic-Error Signals in the AC Josephson Voltage Standard: Measurement and Reduction

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4 Author(s)
Pinheiro Landim, R. ; Nat. Inst. of Stand. & Technol., Boulder ; Benz, S.P. ; Dresselhaus, P.D. ; Burroughs, C.J.

We investigate the dominant frequency-dependent systematic-error signals (SESs) in the AC Josephson voltage standard. We describe our error measurement technique and a number of methods to reduce the errors. Most importantly, we found that a small change in on-chip wiring significantly reduces the SES, improves SES measurement stability, and enables a suitable bias correction method. We show that direct analog-to-digital converter measurements of the SES of two on-chip Josephson arrays are in very good agreement with errors inferred from AC-DC transfer standard measurements. Finally, we demonstrate that the reduction of the SES using these techniques greatly improves the agreement between the AC-DC differences of the two arrays as well as the absolute AC voltage accuracy.

Published in:

Instrumentation and Measurement, IEEE Transactions on  (Volume:57 ,  Issue: 6 )

Date of Publication:

June 2008

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