Referenced Items are not available for this document.
The impedance of a microprocessor power-delivery network peaks at ~140 MHz, resulting in power-grid resonance, which lowers operating frequency and compromises gate oxide integrity. A suppression circuit is designed using an active-damping technique with a maximum of 13 dB supply voltage noise reduction from 70 to 250 MHz in a 90 nm CMOS process.
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:43
,
Issue:
1
)
Date of Publication: Jan. 2008
- Page(s):
- 61 - 68
- ISSN :
- 0018-9200
- INSPEC Accession Number:
- 9757304
- Digital Object Identifier :
- 10.1109/JSSC.2007.913155
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 28 January 2008
- Issue Date :
- Jan. 2008
- Sponsored by :
- IEEE Solid-State Circuits Society
About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies
A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.
