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Experimentally characterizing the behavior of multiprocessor memory systems: a case study

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5 Author(s)
K. Gallivan ; Center for Supercomput. Res. & Dev., Illinois Univ., Urbana, IL, USA ; D. Gannon ; W. Jalby ; A. Malony
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It is demonstrated how the behavior of a cache-based multi-vector-processor memory system can be systematically characterized and its performance experimentally correlated with key features of the address stream. The approach is based on the definition of a family of parameterized kernels used to explore specific aspects of the memory system's performance. The empirical results from this kernel suite provide the data from which architectural or algorithmic characteristics can be studied. The results of applying the approach to an Alliant FX/8 are presented and evaluated

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IEEE Transactions on Software Engineering  (Volume:16 ,  Issue: 2 )