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A Heterogeneous 16-Bit DAC Using a Replica Compensation

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1 Author(s)
Dongwon Seo ; Qualcomm Inc., San Diego, CA

A highly monotonic very low power 16-bit 2-MS/s digital-to-analog converter (DAC) for high-resolution control loop systems is proposed and demonstrated. Replica compensation is used in improving the monotonicity of a heterogeneous DAC composed of a coarse current steering DAC and a fine resistor-ladder DAC. A complete DAC, including an on-chip bandgap reference and an output buffer, consumes only 0.6 mA with a 2.7-V supply. The 2.19-mm2 DAC with 10-I/O bonding pads implemented in 0.18-mum Bi-CMOS process achieves plusmn0.8 least significant bit (LSB) differential nonlinearity, plusmn4 LSB integral nonlinearity, and plusmn3-mV offset error at 2-MS/s sample rate.

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Circuits and Systems I: Regular Papers, IEEE Transactions on  (Volume:55 ,  Issue: 6 )