By Topic

Optimal Design of All-Pass Variable Fractional-Delay Digital Filters

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Wei Rong Lee ; Dept. of Math. & Stat., Curtin Univ. of Technol., Perth, WA ; Lou Caccetta ; Volker Rehbock

This paper presents a computational method for the optimal design of all-pass variable fractional-delay (VFD) filters aiming to minimize the squared error of the fractional group delay subject to a low level of squared error in the phase response. The constrained optimization problem thus formulated is converted to an unconstrained least-squares (LS) optimization problem which is highly nonlinear. However, it can be approximated by a linear LS optimization problem which in turn simply requires the solution of a linear system. The proposed method can efficiently minimize the total error energy of the fractional group delay while maintaining constraints on the level of the error energy of the phase response. To make the error distribution as flat as possible, a weighted LS (WLS) design method is also developed. An error weighting function is obtained according to the solution of the previous constrained LS design. The maximum peak error is then further reduced by an iterative updating of the error weighting function. Numerical examples are included in order to compare the performance of the filters designed using the proposed methods with those designed by several existing methods.

Published in:

IEEE Transactions on Circuits and Systems I: Regular Papers  (Volume:55 ,  Issue: 5 )