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The article described a new design of high-speed data transmission, used in BESIII trigger system, with optical fibre that was based on the on-chip serial/deserial transceiver in FPGA. A special custom protocol is defined to transfer the consecutive and real-time data, recover and process the data belongs to the same event at the same time. The design was tested for a long period run. A high level of confidence bit error rate was obtained, and all channels from different transmitters were re-aligned by using unfixed delay alignment method. The design was implemented in the trigger system and would meet the requirements of BESIII.