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FPGA implementation of a high-resolution time-to-digital converter

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6 Author(s)

In the past years, precise measurements of time intervals have been realized using methods such as time- stretching, Vernier and delay line. In this paper, we present two high-resolution time-interval measuring system implemented in a SRAM-based FPGA device. The two methods ought to be used for time interpolation within the system clock cycle. In the first method, dedicated carry lines are used to perform fine time measurement, while in the second one a differential tapped delay line is used. In this paper we compare the two architectures and show their performance in terms of stability and resolution.

Published in:

Nuclear Science Symposium Conference Record, 2007. NSS '07. IEEE  (Volume:1 )

Date of Conference:

Oct. 26 2007-Nov. 3 2007

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