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The paper presents a technique for implementing finite impulse response (FIR) filtering in last generation digital signal processors (DSP), which has been specifically designed and developed. Thanks to a fully assembler coded firmware that exploits at best the device resources, a maximum parallel data processing architecture can be implemented that considerably improves the filtering process efficiency with respect to standard solutions that are based on C language firmware codes.
Nuclear Science Symposium Conference Record, 2007. NSS '07. IEEE (Volume:1 )
Date of Conference: Oct. 26 2007-Nov. 3 2007