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The first fully integrated implementation of a patch-clamp measurement system is presented. The system was implemented in a 0.5 mum silicon-on-sapphire process. The system can record cell membrane currents up to plusmn 20 nA, with an rms noise of 5 pA at 10 kHz bandwidth. The system can compensate for the capacitance and resistance of the pipette electrode, up to 20 pF and 4 MOmega, respectively. The die size is 1150 by 700 mum. The power consumption is 3.3 mW at 3.3 V.