Scalable 3-D Fin-Like Poly-Si TFT and Its Nonvolatile Memory Application

In this paper, we extensively investigated the structure and electrical characteristics of an n-type poly-Si thin-film transistor with a novel 3-D fin-like channel. Further, owing to the high-quality thin film in the channel, an experimental device with a nonvolatile (NV) memory structure for system integration on panel or embedded memory applications is successfully demonstrated for the first time. By following the previously reported method and by improving the process conditions, the final fin-like channel shows a real 3-D profile and a maximum aspect ratio of 3.5:1 with a minimum average width equal to 135 nm after an excimer laser annealing on a unique prepatterned amorphous silicon channel. The high-level dc characteristics, such as carrier's field-effect mobility up to $289\,{\rm cm}^2 /{\rm V}\cdot {\rm s}$, subthreshold slope below 190 mV/dec, on–off current ratio greater than $5 \times 10^6$, etc., reveal the effect of film quality and the advantage of the gate-all-around structure on the device's performance; moreover, it also indicates one potential scaling method for this technology. By applying a special program/erase (P/E) mode with electron injection/expulsion from the backside gate electrode, the NV memory structure in this channel demonstrates reasonable P/E characteristics, threshold voltage shifting of 1.41 V at $\vert {V_g}\vert = 12$ V, pulse time $= 1$ ms, and acceptable reliability.