By Topic

Optimal image computations on reduced VLSI architectures

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Alnuweiri, H.M. ; Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA ; Kumar, V.K.P.

A communication-efficient parallel organization with a reduced number of processors is considered for problems in image processing and computer vision. The organization consists of n processors having row and column access to an n×n array of memory modules which stores an n×n image. It can be looked upon as a reduced mesh-of-trees organization in which the n2 leaf processors are replaced by n2 memory locations and each row (column) tree is replaced by a single processor with a row (column) bus. The class of image problems considered here requires dense data movement as well as global operations on image pixels. Examples include histogramming, image labeling, computing convexity and nearest neighbors. It is shown that while such problems can be solved in O(n) time on a two-dimensional mesh-connected computer with n2 processors, they can also be solved on the proposed organization in O(n) time using n processors only. In addition, all of the parallel solutions presented are processor-time optimal solutions

Published in:

Circuits and Systems, IEEE Transactions on  (Volume:36 ,  Issue: 10 )