Close category search window
 

A high speed image codec VLSI for document retrieval

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Sato, F. ; Toshiba Corp., Ome, Japan ; Murayama, M. ; Sumita, S. ; Adachi, K.

A new high-speed expansion scheme for binary image data compressed using the MMR code is presented. The proposed scheme enables the output image data to flow at nearly the maximum data flow rate of 1 byte per machine cycle, even for a rather complicated image, such as CCITT reference document No. 4. A key to this performance is the proposed concept of parallel image streaming combined with bit-parallel, concurrent decoding of the next codeword. Based on these concepts, a VLSI chip was designed, fabricated, and evaluated. The effectiveness of the scheme is evidenced by the fact that any of the CCITT reference documents are expanded in 0.11 to 0.13 s

Published in:
Circuits and Systems, IEEE Transactions on  (Volume:36 ,  Issue: 10 )

Date of Publication: Oct 1989

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.