By Topic

Design and implementation of a fast active noise control system on FPGA

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
A. Jalali ; Electrical and Computer engineering faculty, Shahid Beheshti University, Tehran, Iran ; Sh. Gholami Boroujeny ; M. Eshghi

In this paper an ANC system is implemented on the Stratix family FPGA from Altera Company. The controller uses the LMS algorithm for updating the adaptive coefficients array with M=64. A comparison of this implementation with implementation results on DSP processors shows that the speed up of FPGA with respect to the DSP is 750.

Published in:

Control & Automation, 2007. MED '07. Mediterranean Conference on

Date of Conference:

27-29 June 2007