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The presence of discontinuities along a package interconnection distorts the electromagnetic field pattern, resulting in signal integrity (SI) effects especially at more than 1 Gb/s. Such effects also frequently arise when geometrical and material parameters of components in packages were unexpectedly changed during the assembly process. It may therefore lead to a degradation of the package performance. In this paper, we examine the parasitic effects of signal and power on the high-speed flip-chip ball grid array (FC-BGA) packages. A proposed model is established based on the measurement results. The circuit simulation of the package model can then be performed to analyze the various factors of signal quality.