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Minimizing Response Time Implication in DVS Scheduling for Low Power Embedded Systems

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5 Author(s)
Nasro Min-Allah ; Institute of Software, Chinese Academy of Sciences, Beijing 100080, China. ; Asad-Raza Kazmi ; Ishtiaq Ali ; Xing Jian-Sheng
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Recently, a lot of work has been done on minimizing energy consumption of real time embedded systems by exploiting hardware characteristics of latest processors. However, these techniques are effective to energy reduction at the expense of delayed responsiveness; a feature highly discouraged in real time embedded systems. As opposed to the previous works, we value response time of higher importance than energy reduction after reliability, when a tradeoff is involved. In this paper, we present a novel technique for scheduling mixed tasks on single dynamic voltage scaling enabled processor. The proposed algorithm, preserves all timings constraints for hard periodic tasks under worst case execution time scenario, improves responsiveness to periodic tasks and, saves as much energy as possible for hybrid workload.

Published in:

Innovations in Information Technology, 2007. IIT '07. 4th International Conference on

Date of Conference:

18-20 Nov. 2007