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80 GHz low noise amplifiers in 65nm CMOS SOI

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8 Author(s)

A 1 stage and 3 stages 80 GHz low noise amplifiers (LNA) are presented in this paper. Both mm-wave LNA are integrated in a 65 nm CMOS SOI process. The one stage amplifier exhibits 2.1 dB gain and a noise figure of 4.5 dB at 80 GHz. The input and output return losses are -13 dB and -6 dB respectively. This amplifier consumes 22 mW from a supply voltage of 1.2 V and occupies an area of 0.64 mm2 including the pads. The 3 stages LNA presents a gain of 7.2 dB and a noise figure of 5.7 dB at 80 GHz with an input and output matching better than -14 dB and -10 dB respectively. The 3 stages amplifier consumes 70 mW from a supply voltage of 1V and occupies an area of 0.98 mm2 including pads.

Published in:

Solid State Circuits Conference, 2007. ESSCIRC 2007. 33rd European

Date of Conference:

11-13 Sept. 2007