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In this paper, an efficient design for the high performance, power-aware architecture to extract skinlike regions in the video stream is presented. Skin segmentation is an important step in many image processing and computer vision applications such as face detection and hand gesture recognition. The design utilizes the high correlation and similarity of neighboring pixels in video streams to reduce switching activity (hence reducing dynamic power dissipation) in the arithmetic unit. The proposed design is implemented and fitted in the Altera's Cyclone II FPGA which is available in the DE2 development and educational board. The pipelined system is capable of performing the skin segmentation procedure in real-time with a processing rate of 654 frames per second for video frames with standard size of 640*480. It is observed that the proposed design helps to reduce operations and switching activities in the processing unit up to 42 percent which results in lower dynamic power dissipation with low hardware overhead.