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Increasing operating temperature of Multiprocessor Systems on Chip coupled with uneven distribution of power dissipation may lead to large spatial and temporal temperature gradient that strongly impact system reliability. In this paper we propose a novel technique for reducing on-chip temperature gradient based on task migration between processing cores. The proposed algorithms exploit run-time temperature information to balance the chip temperature without impacting energy consumption. We demonstrate the effectiveness of the proposed algorithms by comparing the temperature variance obtained using the proposed algorithm with simple balancing strategies considering only load and energy as metrics. Migration costs are also considered as a metric for comparison.