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An SoC based HW/SW co-design architecture for multi-standard audio decoding

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6 Author(s)
Dajiang Zhou ; Shanghai Jiaotong Univ., Shanghai ; Peilin Liu ; Ji Kong ; Yunfei Zhang
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In this paper, we presented an SoC based HW/SW co-design architecture for multi-standard audio decoding. It is developed to support the audio standards of AAC LC profile, Dolby AC3, Ogg Vorbis, MPEG-1 Layer 3 (MP3) and Windows Media Audio (WMA). A VLSI reconfigurable filterbank based on CORDIC algorithm is developed to accelerate the multi-standard decoding process. We designed and implemented an SoC platform to verify the interbank as an IP core. Experimental result shows that the architecture is able to perform real-time audio decoding at low frequency (typically 10.6MHz for AAC and 11.3 MHz for MP3) and the implementation cost is low (44.3k gates, 34k bytes RAM and 45k bytes data ROM for 5 audio standards). The architecture is also flexible for extending support of new formats and standards.

Published in:

Solid-State Circuits Conference, 2007. ASSCC '07. IEEE Asian

Date of Conference:

12-14 Nov. 2007