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A multi matrix-processor core architecture for real-time image processing SoC

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10 Author(s)

This paper describes a real time image processing SoC (MX-SoC) with programmable multi matrix -processor (MX-core) architecture. The MX-SoC has three MX-cores, host-CPU, and I/O peripheral modules. An unit MX-core is a massively parallel (1024) flexible SIMD processor based on the matrix architecture. The MX-SoC, which can perform the image processing of CCD camera, is implemented on 90nm low power CMOS process technology and can operate at 162 MHz under the worst condition. A novel parallel pixel data processing algorithm, and multi task execution suitable for multi MX-core processing can achieve 30 frame/sec image processing. This performance is 30 times faster than general purpose CPU solution. The MX-SoC with multi MX-core architecture can realize the software solution of real time image processing application field.

Published in:

Solid-State Circuits Conference, 2007. ASSCC '07. IEEE Asian

Date of Conference:

12-14 Nov. 2007