The role of the temperature boundary conditions on the gate electrode on the heat distribution in 25 nm FD-SOI MOSFETs with SiO2 and gate-stack (High-K Dielectric) as the gate oxide

In this work, in addition to the previously noted observation regarding the influence of the velocity overshoot, we also investigate the influence of the temperature boundary condition on the gate electrode on the current degradation due to heating effects. That is, we use the gate contact as a heat sink to properly solve the phonon balance equations. Table 1 gives the percentage of the current decrease due to the heating effects with the variation of gate electrode temperature. The calculated results show that the current degradation is more prominent for higher gate temperatures. Figure 2 shows the velocity profile along the channel for different gate temperatures, where as can be seen, the velocity in the channel decreases with the increase of the gate temperature but the carriers in the channel are still in the velocity overshoot regime. As seen from the temperature maps of acoustic phonons in Figure 3, the lattice temperature in the source, channel and drain region is increasing with the increase of the gate temperature, which means that the increased lattice temperature has larger impact on the decrease of the carrier velocity in the channel.