On-state and switching performance investigation of sub-50nm L-DUMGAC MOSFET design for high-speed logic applications

In this paper, an extensive study on the on-state and switching behavior of laterally amalgamated dual material gate concave (L-DUMGAC) MOSFET (Fig.l) is performed and the influence of technology variations, such as gate length, negative junction depth (NJD) and gate bias has been investigated using ATLAS device simulator.