Referenced Items are not available for this document.
In this paper, we exploit the 3D-capability of the method to refine simulator resolution to the different material layers of an IC. We have designed and had fabricated ICs with built-in heaters and a temperature sensor array. We use measurement results from these ICs to calibrate our simulator, and investigate the effectiveness of horizontal metal networks and vertical thermal via structures, which have been suggested for the cooling of 3D ICs. We also study the latter method for controlled, localized chip heating.
Published in:
Semiconductor Device Research Symposium, 2007 International
Date of Conference: 12-14 Dec. 2007
- Page(s):
- 1 - 2
- E-ISBN :
- 978-1-4244-1892-3
- Print ISBN:
- 978-1-4244-1892-3
- INSPEC Accession Number:
- 9824846
- Conference Location :
- College Park, MD
- Digital Object Identifier :
- 10.1109/ISDRS.2007.4422238
- Product Type:
- Conference Publications
About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies
A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.
