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Strained Si n-FET featuring compliant SiGe Stress Transfer Layer (STL) and Si0.98C0.02 source/drain stressors for performance enhancement

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9 Author(s)
Wang, Grace Huiqi ; Nat. Univ. of Singapore, Singapore ; Toh, Eng-Huat ; Weeks, D. ; Landin, T.
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We report the first demonstration of an n-channel transistor (n-FET) featuring a compliant Si0.75Ge0.25 stress transfer layer (STL) and in situ doped Si0.98C0.02 source/drain (S/D) stressors for performance enhancement. Due to the stress coupling between Si0.98C0.02 and the compliant SiGe STL, additional strain is imparted to the Si channel. Devices with gate length LG down to 30 nm were fabricated. The enhanced strain effects resulted in 65% drive current improvement in strained n-FETs over control n-FETs for a given DIBL of 0.20 V/V.

Published in:

Semiconductor Device Research Symposium, 2007 International

Date of Conference:

12-14 Dec. 2007

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