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On-Line Dynamic Voltage Scaling on Processor with Discrete Frequency and Voltage Levels

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3 Author(s)
Min-Sik Gong ; Chungnam Nat. Univ., Daejeon ; Yeong Rak Seong ; Cheol-Hoon Lee

The processors supporting the dynamic voltage scaling, called by DVS, have a feature that practically operates with discrete frequency and voltage levels. Almost of DVS algorithms select the smallest frequency level greater than the computed ideal level. Thus the system wastes a computational resource due to under-utilization. In this paper, we present an approach that the task executes its job under two adjacent discrete frequency levels, if possible, instead of the scaling factor computed by on-line dynamic voltage scaling(OLDVS) under the ideal level. This approach combines discrete DVS feature with OLDVS. So, each task can divide the given time budgets into two parts. Then the task executes its job at the lower frequency/voltage level in the first part. If the task does not complete until the end of the first part, then the scheduler increases the frequency to complete the remaining computation load with the remaining time budgets. Therefore, it can achieve more energy savings than the original OLDVS while simultaneously preserving timeliness guarantees made by real-time scheduling. Simulation results show that OLDVS provides up to 20% of additional energy savings for Intel PXA250[18] which has four discrete frequency/voltage levels.

Published in:

Convergence Information Technology, 2007. International Conference on

Date of Conference:

21-23 Nov. 2007