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Semiconductor wafer fabrication facilities (wafer fabs) are among the most complex production facilities. A large product variety, hundreds of processing steps per product, hundreds of machines of different types, and automated transport lead to a system complexity which is hard to understand and hard to handle. For educating planners and developing adequate material flow control mechanisms, simple models for this complex environment are required. Several years ago, we published some first approaches which were useful to explain the fab behavior after a serious bottleneck breakdown. With that simple model, however, it was only possible to predict the cycle time distribution of the lots for a few scenarios. In this paper, we present some model improvements which lead to a rather good cycle time prediction for a variety of load situations.