Scheduled System Maintenance:
Some services will be unavailable Sunday, March 29th through Monday, March 30th. We apologize for the inconvenience.
By Topic

New Self-Aligned Silicon Nanowire Transistors on Bulk Substrate Fabricated by Epi-Free Compatible CMOS Technology: Process Integration, Experimental Characterization of Carrier Transport and Low Frequency noise

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

The purchase and pricing options are temporarily unavailable. Please try again later.
8 Author(s)

A new method to fabricate self-aligned silicon nanowire transistors (SNWTs) has been realized on bulk silicon substrate by fully epi-free compatible CMOS technology. The SNWTs exhibit excellent immunity of short-channel effects (SCEs) and achieve high Ion/Ioff ratio of 2.6times108. The transportation characteristics, ballistic efficiency and low frequency noise of SNWTs are investigated for the first time.

Published in:

Electron Devices Meeting, 2007. IEDM 2007. IEEE International

Date of Conference:

10-12 Dec. 2007