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Gate-First Processed FUSI/HfO2/HfSiOx/Si MOSFETs with EOT=0.5 nm - Interfacial Layer Formation by Cycle-by-Cycle Deposition and Annealing

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11 Author(s)
M. Takahashi ; MIRAI-ASET, AIST Tsukuba West 7, 16-1 Onogawa, Tsukuba, Ibaraki 305-8569, Japan. Phone: +81-298-49-1553 Fax: +81-298-49-1529 E-mail: ; A. Ogawa ; A. Hirano ; Y. Kamimuta
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We have successfully fabricated a 0.5 nm FUSI-NiSi/ HfO2 HfSiOx/ Si gate stack structure with the gate-first process. The HfSiOx interfacial layer was formed by the cycle-by-cycle deposition and annealing process, followed by the in-situ layer-by-layer deposition and annealing for HfO2 growth. The gate leakage current of ~ 10 A/cm at Vfb - 1.0 V and the effective electron mobilityof 120 cm2/Vs at 0.8 MV/cm were obtained for n-MOSFET with EOT = 0.49 nm.

Published in:

2007 IEEE International Electron Devices Meeting

Date of Conference:

10-12 Dec. 2007