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Fully-depleted SOI technology using high-k and single-metal gate for 32 nm node LSTP applications featuring 0.179 μm2 6T-SRAM bitcell

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52 Author(s)

In this paper, we report on FD-SOI with high-k and single metal gate as a possible candidate for the 32 nm LOP and LSTP nodes. Good Ion/Ioff performance for nMOS and pMOS transistors in the ultra-low-leakage regime (Ioff=6.6 pA/μm) are presented. In addition co-integration of high voltage devices with EOT 29A/Vdd 1.8 V are made. For the first time, the functionality of 0.248 μm and 0.179 μm2 6T-SRAM bit-cells is demonstrated on FDSOI technology with a high-k/metal gate stack.

Published in:

Electron Devices Meeting, 2007. IEDM 2007. IEEE International

Date of Conference:

10-12 Dec. 2007