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45nm Gateless Anti-Fuse Cell with CMOS Fully Compatible Process

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7 Author(s)
Yi-Hung Tsai ; Institute of Electronics Engineering, National Tsing-Hua University, Hsin-Chu 300, Taiwan ; Hsin-Ming Chen ; Hsin-Yi Chiu ; Hung-Sheng Shih
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A new gateless anti-fuse cell with 45 nm CMOS fully compatible process has been developed for advanced programmable logic applications. This gateless anti-fuse cell processed by pure logic process and decoupled with logic gate oxide has a highly stable and five orders of on/off current window. It also exhibits superior program performance by only 5 V operation with no more than 10 muA programming current. This new nitride gateless anti-fuse cell is a very promising logic OTP solution with fully CMOS compatible process below 90 nm node.

Published in:

2007 IEEE International Electron Devices Meeting

Date of Conference:

10-12 Dec. 2007