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Work in progress - Introduction of K-map based nano-logic synthesis as knowledge module in logic design course

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2 Author(s)
Saket Srivastava ; Electrical Engineering, University of South Florida, Tampa, 33613, USA ; Sanjukta Bhanja

This work in progress reports an effort of introducing knowledge module regarding novel nano-devices and novel logic primitives in undergraduate logic design class. Our motivation is to make our students aware of fundamental abstracted logical behaviors of future nano-devices, their functionality. This effort would also help the students use their existing knowledge of K-map based logical synthesis into constructing logic blocks for novel devices that uses majority logic as basic construct. Moreover, additional to stimulating our students' interests, we are also augmenting their learning by challenging them to use their existing knowledge to analyze, synthesize and comprehend novel nano-logic issues through the worksheets and lecture modules. Whereas many efforts are focusing on developing new courses on nanofabrication and even nano-computing, we intend to augment the existing standard EE and CS courses by inserting knowledge modules on nano-logic structure for stimulating their interest without significant diversion from the course framework.

Published in:

2007 37th Annual Frontiers In Education Conference - Global Engineering: Knowledge Without Borders, Opportunities Without Passports

Date of Conference:

10-13 Oct. 2007