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A Study of the Rheological Properties of Lead free Solder Paste formulations used for Flip-Chip Interconnection

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4 Author(s)
S. Mallik ; Electronics Manufacturing Engineering Research Group, School of Engineering, University of Greenwich at Medway, Chatham Maritime, Kent ME4 4TB, UK ; N. N. Ekere ; R. Durairaj ; A. E. Marks

The market for solder paste materials in the electronics sector is very large and consists of material and equipment suppliers and end users. These materials are used to bond electronic components (e.g. flip-chip, BGA) to printed circuit boards (PCB's) across a range of dimensions where the solder interconnects can be 50 microns to 1 mm in size. For materials suppliers, the trends in the market are towards environmentally friendly materials (e.g. lead-free solders) that can be used at ever-smaller dimension where the properties of the materials must ensure reliable product performance. Equipment suppliers, for example printing machine manufacturers, are continually updating their equipment characteristics to ensure better print yield of solder paste onto a PCB. Whilst the End Users must ensure that the combination of materials and equipment used will provide the required product quality in terms of reliable interconnection performance. This study concerns the rheological characterisation of different lead-free solder paste formulations used for flip-chip interconnections, and is made up of three parts. The first part deals with the measurement of rheological properties with three different measuring geometries, the second part looks into the effect of frequencies on oscillatory stress sweep measurements and the final part reports on the characterisation and comparison of three different lead-free solder paste formulations. The objective of the study is to investigate the rheological behaviour of the three lead-free solder paste formulations used for flip-chip interconnection. Our study shows that of the three plate geometries evaluated, the serrated parallel plate geometry was more effective in minimizing the wall-slip. Our results also show that for the oscillatory stress-sweep measurement, the linear visco-elastic region (LVR) is independent of frequency for the three solder paste formulations. The results also show how wall-slip effects can be minimized in rheol- ogical measurements of solder pastes. The paper also outlines how different rheological test methods can be used to characterise solder paste behaviours and useful guide for both paste manufacturers and process engineers implementing flip-chip assembly.

Published in:

Electronic Manufacturing Technology Symposium, 2007. IEMT '07. 32nd IEEE/CPMT International

Date of Conference:

3-5 Oct. 2007