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A power-aware adaptive routing scheme for network on a chip

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5 Author(s)
Sheng-guang Yang ; Institute of VLSI Design, Nanjing University, 210093, China ; Li Li ; Yi Xu ; Yu-ang Zhang
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NoC (Network on a chip) is being proposed as a scalable and reusable communication platform for future SoC (System on a chip) applications. Power is a critical issue in interconnection network design, driven by power-related design constraints, such as power distribution optimization and thermal protection design, especially when network becomes huge. In this work, we present an on-chip routing scheme based on a new power model and dynamic XY routing algorithm, which can adapt routing decision based on power conditions, optimize power distribution and avoid hotspots occurring in the network. To verify the routing scheme, a SystemC-based NoC(Mesh4times4) simulator is built. Experiments demonstrate the proposed routing scheme can effectively regulate network power distribution to meet power balance requirement (maximum and variance of power can decrease by 8.1% and 21.1% at best respectively) with negligible network performance penalty.

Published in:

2007 7th International Conference on ASIC

Date of Conference:

22-25 Oct. 2007