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A mixed-signal programmable filter suitable for high- rate WLAN is addressed in this work. The proposed filter has analog input and analog-sampled outputs. The filter taps are stored in a digital memory and can be changed easily to meet any receiver requirements. The filter structure is based on a bank of digitally controlled transconductors realized by simple CMOS inverters and thus can be integrated efficiently with digital parts. A cosine rolloff filter is designed and investigated by simulation in frequency domains. Comparison with other recent works shows that the proposed structure has a good speed-complexity-consumption trade-off.