Skip to Main Content
A cooperative management scheme for power efficient implementations of real-time operating systems on field-programmable gate-array (FPGA)-based soft processors is presented. Dedicated power management hardware peripherals are tightly coupled to a soft processor by utilizing its configurability. These hardware peripherals manage tasks and interrupts in cooperation with the soft processor, while retaining the real-time responsiveness of the operating system. More specifically, the hardware peripherals perform the following power management functionalities: (1) control the on-chip clock distribution network for driving the soft processor, its hardware peripherals, and the bus interfaces between them; (2) perform task and interrupt management responsibilities of the operating system when the soft processor is turned off; and (3) selectively wake up the soft processor and its hardware components, and put them into proper activation states based on the hardware resource requirements of the tasks under execution. The implementations of two popular real-time operating systems on a state-of-the-art FPGA device are presented. Measurements on an experimental board show that the proposed power management scheme can lead to significant power savings.
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on (Volume:16 , Issue: 1 )
Date of Publication: Jan. 2008