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Signal Processing Architectures for Low-Noise High-Resolution CMOS Image Sensors

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1 Author(s)
Kawahito, S. ; Shizuoka Univ., Hamamatsu

In this paper, signal processing architectures for low-noise high-resolution CMOS image sensors are reviewed and discussed. For low-noise signal readout, a column amplifier plays an important role for reducing both the noises due to a wideband output buffer and a pixel source follower. With high amplifier gain, a double-stage noise canceling technique and an advanced signal processing using oversampling techniques effectively reduce the noise due to the pixel source follower. Architectures and topologies for on-chip A/D conversion including pixel parallel, column parallel and serial schemes are also discussed. On-chip column parallel analog-to-digital (A/D) conversion is particularly important for low-noise and high-speed signal readout.

Published in:

Custom Integrated Circuits Conference, 2007. CICC '07. IEEE

Date of Conference:

16-19 Sept. 2007