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A 4GHz Low Complexity ADPLL-based Frequency Synthesizer in 90nm CMOS

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3 Author(s)
Jingcheng Zhuang ; Carleton Univ., Ottawa ; Qingjin Du ; Kwasniewski, T.

A 4 GHz ADPLL-based integer-N frequency synthesizer is reported in this paper. It employs a low-complexity digital phase and frequency detector as well as a non-linear phase and frequency decision circuit to significantly reduce the hardware complexity while maintain a comparable in-lock performance to other high-complexity ADPLLs. The ADPLL was fabricated in 90 nm CMOS technology to prove its feasibility. Operating with a high-frequency-resolution DCO, the proposed low-complexity ADPLL exhibits a programmable loop bandwidth from 100 kHz to 6 MHz with and an excellent in-band phase noise performance.

Published in:

Custom Integrated Circuits Conference, 2007. CICC '07. IEEE

Date of Conference:

16-19 Sept. 2007

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