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Efficient energy consumption became an important requirement and constraint to be considered in many systems implementations, mainly to the embedded ones. Accurate and efficient power estimation during the design phase is required, in order to meet the power specifications without a costly redesign. High abstraction levels descriptions enable fast energy consumption estimations, but hardly enable accurate estimations. It normally requires evaluations at low abstraction levels, such as electric ones. On the other hand, low abstraction levels require too much design effort and design time. In this sense, this work presents an approach for energy consumption estimation for systems written in synthesizable VHDLs. A VHDL cell library is the base of the methodology, which is characterized with some relevant energy consumption information according to foundry parameters. The use of this approach leads to high-quality energy consumption estimations and design time saving.
Date of Conference: 15-17 Oct. 2007