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Efficient 16-bit Floating-Point Interval Processor for Embedded Systems and Applications

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2 Author(s)
Stephane Piskorski ; Univ. Paris-Sud, Orsay ; Lionel Lacassagne

This paper presents the implementation of a 16-bit interval floating-point unit on a soft-core processor to allow interval computations for embedded systems. The distributed localization of a source using a network of sensors is presented to compare the performance of the proposed processor to that obtained with a general- purpose processor.

Published in:

Scientific Computing, Computer Arithmetic and Validated Numerics, 2006. SCAN 2006. 12th GAMM - IMACS International Symposium on

Date of Conference:

26-29 Sept. 2006