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High-Pressure Deuterium Annealing Effect on Nanoscale Strained CMOS Devices

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8 Author(s)

High-pressure deuterium annealing was applied to nanoscale strained CMOS devices, and its effect was characterized in terms of charge pumping method, hot-carrier-induced stress, negative bias temperature instability stress, and 1/f noise for the first time. For the NMOS, the characteristics of both control and tensile-stressed NMOS devices were improved by annealing; in particular, tensile-stressed NMOS devices had more improved characteristics than the characteristics of control devices. However, for the PMOS, compressive-stressed PMOS devices particularly had more degraded characteristics compared with the characteristics of control PMOS devices.

Published in:

Device and Materials Reliability, IEEE Transactions on  (Volume:8 ,  Issue: 1 )

Date of Publication:

March 2008

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