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Device-circuit co-optimization for mixed-mode circuit design via geometric programming

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4 Author(s)
Jintae Kim ; Department of Electrical Engineering, University of Californica, Los Angeles, USA ; Ritesh Jhaveri ; Jason Woo ; Chih-Kong Ken Yang

Modern processing technologies offer a number of types of devices such as high-VT, low-VT, thick-oxide, etc. in addition to the nominal transistor in order to meet system performance and functional needs. While designers have leveraged these devices for mixed-signal design, a design framework is needed to guide designers in selecting the best set of devices. The same framework can enable device manufacturers decide which new devices to include in the suite of device offerings. This paper presents a design methodology that can quickly guide a designer in selecting the best set of devices for a given application, specifications, and circuit structure. The equation-based optimization framework based on geometric programming (GP) extends upon previous efforts that optimize sizing, biasing, and supply voltages. The paper first shows that convex piecewise-linear function fitting can effectively model for optimization all the types of devices offered by a 90 nm CMOS technology. Additionally, we show the potential to model and include experimental devices such as a Schottky tunneling source MOSFET. Second, the paper applies the model to an example circuit, a track-and-hold amplifier. The optimization and subsequent simulation illustrate the importance and amount of benefit from applying device selection.

Published in:

2007 IEEE/ACM International Conference on Computer-Aided Design

Date of Conference:

4-8 Nov. 2007