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Transactors for parallel hardware and software co-design

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1 Author(s)
Asanovic, K. ; Comput. Sci. Div., Univ. of California at Berkeley, Berkeley, CA

The use of higher-level design specifications is required for large scale embedded systems, yet these must admit efficient hardware and software implementations. The transactor model separates local computation from global communication, and avoids overspecifying the execution of computations within each unit. The use of guarded atomic commands provides a clean model for concurrent activities that share state within each unit, and supports computations on non-deterministic input streams.

Published in:

High Level Design Validation and Test Workshop, 2007. HLVDT 2007. IEEE International

Date of Conference:

7-9 Nov. 2007