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In this paper, an analytical model of an electrothermal filter (ETF) is described. It is based on thermal impedance theory and employs several simplifying assumptions to model an ETF implemented in CMOS technology. A CMOS ETF's phase-shift has a well-defined temperature dependence, and can be utilized to build temperature-to-frequency converters (TFC). However, the resolution of such converters is limited by the ETF's SNR. The analytical model was used to design an optimized ETF with increased SNR in a standard 0.7-mum CMOS process. Compared to a previous design, a TFC employing this new ETF achieved 30% less output frequency jitter.