By Topic

Suppression of Power/Ground Inductive Impedance and Simultaneous Switching Noise Using Silicon Through-Via in a 3-D Stacked Chip Package

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

6 Author(s)
Chunghyun Ryu ; Korea Adv. Inst. of Sci. & Technol., Daejeon ; Jiwoon Park ; Jun So Pak ; Kwangyong Lee
more authors

We have thoroughly investigated the advantages of a silicon through-via (STV) interconnection in decreasing the inductive impedance of a power distribution network (PDN) and suppressing simultaneous switching noise (SSN) in a 3-D stacked chip package. A double-stacked chip package with STV interconnections was fabricated and measured together with a similar double-stacked chip package with conventional bonding-wire interconnections. We successfully demonstrated that significant reduction of the inductive PDN impedance, from 1.66 nH to 0.79 nH, can be achieved by replacing the conventional bonding wires in the multiple-stacked chip package by STV interconnections. Furthermore, we have shown that the STV interconnections can considerably reduce high-frequency SSN, by more than 80%, compared to the conventional bonding-wire interconnections.

Published in:

Microwave and Wireless Components Letters, IEEE  (Volume:17 ,  Issue: 12 )