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Area-efficient high-speed carry chain

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1 Author(s)
A. A. Amin ; Dept. of Comput. Eng., King Fahd Univ. of Pet. & Miner., Dhahran

An improved carry chain circuit with carry-skip capability is described. The carry-skip logic allows an arbitrarily long carry chain without the need for intermediate buffers for signal restoration, leading to an implementation that is both fast and area-efficient. The chain can flexibly accommodate technology-imposed maximum depth of NMOS transistor pull-down stack.

Published in:

Electronics Letters  (Volume:43 ,  Issue: 23 )