By Topic

An Optimized Architecture Implementing the Standard JPEG Algorithm on FPGA

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Quazi, H. ; NED Univ. of Eng. & Technol., Karachi ; Qader, F. ; Rasheed, M.J. ; Mansoor, H.

The JPEG algorithm is one of the best compression algorithms. It preserves a good quality while reducing the size to a large extent. It uses advanced image analysis techniques to reduce size while losing the lesser important information. This paper describes a simple and efficient architecture to implement a JPEG encoder trying to use as less resources as possible without compromising much speed or quality.

Published in:

Engineering Sciences and Technology, 2005. SCONEST 2005. Student Conference on

Date of Conference:

27-27 Aug. 2005