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Resource Awareness FPGA Design Practices for Reconfigurable Computing: Principles and Examples

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1 Author(s)
Jinyuan Wu ; Nat. Accel. Lab., Batavia

Computation ability of an FPGA device is determined by three factors: clock frequency, number of logic elements available and efficiency of resource usage, i.e., amount of useful computing works done by unit number of logic elements per clock cycle. The increase of resource is primarily the result of technology progress while the efficient use of the resources is the responsibility of the users. In this document, a variety of examples of the FPGA application in the high-energy physics and accelerator instrumentation will be discussed with emphasis on resource awareness issues. For the FPGA/reconfigurable computing, rich experiences can be transplanted from micro-processor counterpart. While on the other hand FPGA specific issues should be dealt with differently. Several principles in both aspects will be summarized. Topics of this document include: (1) Recognizing FPGA and microcomputer resources, similarities and differences. (2) Flatten designs vs. sequential designs. (3) Principle of loop reduction. (4) Inexplicit computing and hidden resources.

Published in:

Real-Time Conference, 2007 15th IEEE-NPSS

Date of Conference:

April 29 2007-May 4 2007