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Fast and Accurate Interval-Based Timing Estimator for Variability-Aware FPGA Physical Synthesis Tools

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4 Author(s)
Chee Sing Lee ; ECE Department, National University of Singapore, Singapore 117576. email: cslee@nus.edu.sg ; Wei Ting Loke ; Wenjuan Zhang ; Yajun Ha

Process variations of deep sub-micron technologies have created significant timing uncertainty. This generates the need for a new variability-aware physical synthesis tool for Field-Programmable Gate-Arrays (FPGAs). Ideally, variability-aware tools should be able to perform both timing variability estimation during the synthesis and timing variability analysis after the synthesis. Statistical static timing analysis (SSTA) methods are developed to perform timing variability analysis, but are computationally expensive and not fast enough. We propose a fast and accurate interval-based method for the timing variability estimation. This method uses correlation-aware affine intervals instead of probability density distributions to model timing uncertainties. Our model estimates the mean of timing variation within an accuracy of 99.9% and an average range looseness of -7.5% for the Monte Carlo (MC) model. A speed-up of about SOX and 4900X is achieved for the Correlation Aware Canonical Timing (CACT) model and MC model respectively.

Published in:

2007 International Conference on Field Programmable Logic and Applications

Date of Conference:

27-29 Aug. 2007