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High-frequency currents on the pins of integrated circuits (ICs) and on printed circuit board (PCB) traces are needed to predict and analyze electromagnetic interference in high-speed devices. These currents can, however, be difficult to measure when traces are buried within the PCB or chip-package, especially when several current-carrying traces are in close proximity. Techniques for estimating high-frequency currents from near-field scan data are proposed in this paper. These techniques are applied to find currents on the pins of an IC, on traces buried beneath other traces in a PCB, and on traces over a slot in the ground plane. Methods of dealing with the ill-posed nature of the current-estimation problem are discussed, as are applications to electrically large structures. A study of the sensitivity of the technique to errors in the measured fields, errors in the circuit geometry, and errors in the estimated dielectric constant of the PCB or chip package show that, for reasonable errors in these parameters, currents can be estimated to within an average of 20% (1.6 dB) or less of their correct values.